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[/] [xge_mac/] [trunk] - Rev 21

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Rev Log message Author Age Path
21 Improvements for timing, adding alternate FIFO design using XIL define antanguay 4370d 08h /xge_mac/trunk
20 Updates for Xilinx synthesis antanguay 4660d 02h /xge_mac/trunk
19 Updates for 32/64 bit systems antanguay 4835d 04h /xge_mac/trunk
18 Updates for linux 32-bit antanguay 4836d 00h /xge_mac/trunk
17 Fixed deprecated SystemC warnings antanguay 4838d 08h /xge_mac/trunk
16 Rename tb_xge_mac.v to sv extension to fix issue with newer Modelsim antanguay 4838d 14h /xge_mac/trunk
15 Updated for Verilator 3.813 antanguay 4857d 15h /xge_mac/trunk
14 Change interface to big endian, added serdes examples to testbench antanguay 5446d 09h /xge_mac/trunk
13 Change interface to big endian, added serdes examples to testbench antanguay 5446d 10h /xge_mac/trunk
12 Change interface to big endian, added serdes examples to testbench antanguay 5446d 10h /xge_mac/trunk
11 Fixed clock crossing antanguay 5552d 07h /xge_mac/trunk
10 Added details to spec antanguay 5650d 02h /xge_mac/trunk
7 New directory structure. root 5724d 19h /xge_mac/trunk
6 Updated spec. Added mod[2:0] signals. Timing improvements. antanguay 6001d 03h /trunk
5 Fixed compilation antanguay 6007d 03h /trunk
4 Created antanguay 6007d 06h /trunk
2 Initial revision antanguay 6007d 07h /trunk
1 Standard project directories initialized by cvs2svn. 6007d 07h /trunk

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