URL https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk

Subversion Repositories xulalx25soc

[/] [xulalx25soc/] [trunk/] [bench/] [cpp/] [pipecmdr.h] - Rev 112

Rev	Log message	Author	Age	Path
94	Fixes a bug which had caused the device to die artificially and early, just simply because the program connecting to the simulator shut its pipe down before getting our last message. We now ignore this signal and continue.	dgisselq	2930d 23h	/xulalx25soc/trunk/bench/cpp/pipecmdr.h
75	Added simulation capability for the SD-Card, as well as debugging output for the DMA. (The SD-Card debug may not be fully featured, yet, but it has gotten me to where I can talk to the card.)	dgisselq	2936d 20h	/xulalx25soc/trunk/bench/cpp/pipecmdr.h
47	Fixes the "NAN" clocks/second output, as well as making input timing come closer to a realistic timing. (I actually don't know what timing the JTAG port is providing, but ... the new timer is closer.)	dgisselq	3014d 23h	/xulalx25soc/trunk/bench/cpp/pipecmdr.h
37	These fixes were necessary to get the SDRAM into a working simulation capability. It is finally what it was supposed to be: cycle accurate. Sadly, to do this, I did need to make a subtle change to rtl/wbsdram.v. (I was having a problem with external input clocking in Verilator. This fixes it--but its a Verilator only change--to rtl/wbsdram.v that is.)	dgisselq	3023d 00h	/xulalx25soc/trunk/bench/cpp/pipecmdr.h
4	Here's an initial, albeit incomplete, build.	dgisselq	3097d 18h	/xulalx25soc/trunk/bench/cpp/pipecmdr.h