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[/] [yifive/] [trunk/] [caravel_yifive/] [verilog/] [rtl] - Rev 22

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22 test bench update dinesha 1124d 04h /yifive/trunk/caravel_yifive/verilog/rtl
21 Simulation clean up and wishbone interconnect added dinesha 1124d 04h /yifive/trunk/caravel_yifive/verilog/rtl
20 digital core added into svn dinesha 1128d 19h /yifive/trunk/caravel_yifive/verilog/rtl
19 sdram control added dinesha 1128d 23h /yifive/trunk/caravel_yifive/verilog/rtl
18 spi master added dinesha 1128d 23h /yifive/trunk/caravel_yifive/verilog/rtl
17 syntacore_scr1 directory removal dinesha 1129d 18h /yifive/trunk/caravel_yifive/verilog/rtl
16 syntacore_scr1 directory removal dinesha 1129d 18h /yifive/trunk/caravel_yifive/verilog/rtl
15 syntacore_scr1 directory removal dinesha 1129d 18h /yifive/trunk/caravel_yifive/verilog/rtl
14 syntacore_scr1 directory removal dinesha 1129d 18h /yifive/trunk/caravel_yifive/verilog/rtl
13 syntacore_scr1 directory removal dinesha 1129d 18h /yifive/trunk/caravel_yifive/verilog/rtl
12 syntacore_scr1 directory removal dinesha 1129d 18h /yifive/trunk/caravel_yifive/verilog/rtl
11 syntacore directory update dinesha 1129d 18h /yifive/trunk/caravel_yifive/verilog/rtl
10 syntacore interface change to wishbone dinesha 1129d 19h /yifive/trunk/caravel_yifive/verilog/rtl
8 synthesis script update dinesha 1130d 19h /yifive/trunk/caravel_yifive/verilog/rtl
7 synth script clean up dinesha 1130d 19h /yifive/trunk/caravel_yifive/verilog/rtl
6 first yosys synthesisizable rtl dinesha 1130d 20h /yifive/trunk/caravel_yifive/verilog/rtl
5 Webstone interface update dinesha 1131d 00h /yifive/trunk/caravel_yifive/verilog/rtl
4 Removed Git igonore command file dinesha 1131d 01h /yifive/trunk/caravel_yifive/verilog/rtl
3 1. Initial version of westbone interface files copied from turbo8051 open core project
2. Initial version of RISCV Open core project copied from Syntacore SCR1 package		 dinesha 1131d 01h /yifive/trunk/caravel_yifive/verilog/rtl
2 Initial version of efabless caravel user project dinesha 1131d 01h /yifive/trunk/caravel_yifive/verilog/rtl

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