URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [bench/] [asm/] [Makefile] - Rev 166

Rev	Log message	Author	Age	Path
74	Added a bunch of debugging code to the Dhrystone benchmark assembly file, as well as two new testing assembly files.	dgisselq	3230d 04h	/zipcpu/trunk/bench/asm/Makefile
69	This implements the "new Instruction Set" architecture for the Zip CPU. It's a massive change set, that touches just about everything but probably not enough of everything. Please see the spec.pdf for a description of this new architecture.	dgisselq	3236d 08h	/zipcpu/trunk/bench/asm/Makefile
57	Some bug fixes to the dhrystone benchmark, and some compile time defines for the test bench processor. Of the most important note is the fix to detect lockups on the debug/wishbone bus--that has been a real help in getting the ZipCPU installed and the debugger working on the various boards I'm working with. (i.e., it's helped me find and figure out why/when things haven't worked) Of other note is the new 'G' key in the testbench code, to cause the test bench to run without user interaction until the next keystroke. This is very valuable in long programs, as it makes getting to/from breakpoints easier (i.e. you don't have to wait as long, hit 'G', breathe, hit 'space' and you're there).	dgisselq	3307d 11h	/zipcpu/trunk/bench/asm/Makefile
50	Dhrystone benchmark updates--added the copyright notice. (Oops!)	dgisselq	3317d 03h	/zipcpu/trunk/bench/asm/Makefile
41	Assembly file for the Dhrystone benchmark added.	dgisselq	3317d 03h	/zipcpu/trunk/bench/asm/Makefile