URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [bench/] [asm/] [wdt.S] - Rev 81

Rev	Log message	Author	Age	Path
69	This implements the "new Instruction Set" architecture for the Zip CPU. It's a massive change set, that touches just about everything but probably not enough of everything. Please see the spec.pdf for a description of this new architecture.	dgisselq	3254d 02h	/zipcpu/trunk/bench/asm/wdt.S
40	Quick update, updates the assembly for the new version of the assembler.	dgisselq	3334d 21h	/zipcpu/trunk/bench/asm/wdt.S
11	This version works on an FPGA!!! (Or at least the wdt.S program passes ...)	dgisselq	3401d 07h	/zipcpu/trunk/bench/asm/wdt.S
10	Here's the watchdog timer code, as well as some pictures of the register set.	dgisselq	3401d 20h	/zipcpu/trunk/bench/asm/wdt.S