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[/] [zipcpu/] [trunk] - Rev 206

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Rev Log message Author Age Path
206 Updated assembler, fixes several bugs, adds better bug detection and reporting (fixes some segfaults on bugs) dgisselq 2758d 21h /zipcpu/trunk
205 Updating core to current/best version, to include dblfetch support and full CIS support dgisselq 2758d 21h /zipcpu/trunk
204 Added the two simulators back into the SVN repository dgisselq 2777d 16h /zipcpu/trunk
203 Removed the (now unused) old GCC compiler, v5.3.0 dgisselq 2777d 16h /zipcpu/trunk
202 Additional ZipCPU changes associated w 8b upgrade dgisselq 2777d 17h /zipcpu/trunk
201 RTL files for the 8-bit capable ZipCPU. dgisselq 2777d 18h /zipcpu/trunk
200 Lots of GCC bugs fixed, some new features added, longs should work now. The
build scripts have also been updated and simplified.
dgisselq 2877d 01h /zipcpu/trunk
199 Massive specification rewrite, brings it up to date with the current ZipCPU
state. This does not reflect any major change to the CPU.
dgisselq 2902d 14h /zipcpu/trunk
198 Added a copyright notice. dgisselq 2903d 18h /zipcpu/trunk
197 Added a new multiply testbench. Other changes were necessary to follow. dgisselq 2903d 18h /zipcpu/trunk
196 Updated internal documentation. dgisselq 2903d 18h /zipcpu/trunk
195 Adds a new mode that can handle a delayed stall signal. dgisselq 2903d 18h /zipcpu/trunk
194 Cleaned up some parameters, trying to create more consistency. dgisselq 2903d 18h /zipcpu/trunk
193 These changes make it so the ALU multiplies pass a test-bench. dgisselq 2903d 18h /zipcpu/trunk
192 Fixed a bug with constant alignment in the assembler. dgisselq 2903d 18h /zipcpu/trunk
191 Updated toolchain, more information on the example debugger. dgisselq 2918d 21h /zipcpu/trunk
190 Added the copyright statement back in. dgisselq 2920d 13h /zipcpu/trunk
189 Final, as delivered, ORCONF slides. dgisselq 2920d 13h /zipcpu/trunk
188 Adjusted the opcodes to match the binutils port: added RTN instructions, and
allowed BREAK instructions to include an immediate--to be interpreted by the
debugger.
dgisselq 2952d 15h /zipcpu/trunk
187 Updated to match changed register definitions within the core. dgisselq 2952d 16h /zipcpu/trunk

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