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Rev Log message Author Age Path
153 Update XFLOW scripts to bring more automation.
Several bitstreams are now checked in for direct use.		 olivier.girard 4482d 12h /
152 Update ChangeLog olivier.girard 4512d 12h /
151 Add possibility to configure custom Program, Data and Peripheral memory sizes. olivier.girard 4512d 12h /
150 Update ChangeLog olivier.girard 4515d 13h /
149 Update simulation regression result parser.
Fixed failing SFR test (due to newer MSPGCC version).
Implement request http://opencores.org/bug,view,2171 (burst accesses through the serial debug interface)		 olivier.girard 4515d 14h /
148 Update donation pictures' format. olivier.girard 4556d 12h /
147 Add donation buttons olivier.girard 4556d 23h /
146 Update ChangeLog olivier.girard 4565d 13h /
145 Add Dhrystone and CoreMark benchmarks to the simulation environment. olivier.girard 4565d 13h /
144 Update ChangeLog olivier.girard 4586d 14h /
143 Update FPGA software examples to support MSPGCC Uniarch. olivier.girard 4586d 14h /
142 Beautify the linker script examples. olivier.girard 4586d 14h /
141 Update verification environment to support MSPGCC Uniarch (based on GCC 4.5 and later) olivier.girard 4590d 13h /
140 Update ChangeLog olivier.girard 4602d 15h /
139 Add some SVN ignore patterns olivier.girard 4602d 23h /
138 Update simulation scripts to support Cygwin out of the box for Windows users. olivier.girard 4602d 23h /
137 Update ChangeLog olivier.girard 4634d 13h /
136 Update all FPGA projects with the latest core version. olivier.girard 4634d 13h /
135 Update documentation to reflect the ASIC implementation options. olivier.girard 4634d 13h /
134 Add full ASIC support (low-power modes, DFT, ...).
Improved serial debug interface reliability.		 olivier.girard 4634d 14h /

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