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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

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272 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5292d 12h /
271 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5292d 12h /
270 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5292d 12h /
269 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5292d 12h /
268 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5292d 12h /
267 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5292d 12h /
266 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5292d 13h /
265 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5292d 13h /
264 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5292d 13h /
263 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5292d 13h /
262 Baseline port of GCC 4.5.1 for OpenRISC 1000. jeremybennett 5292d 14h /
261 Linux patch update - all ioremap calls now default with cache inhibit julius 5294d 03h /
260 Fixed `define in FPU that didnt need to be there julius 5294d 03h /
259 Fixing or1200_defines FPU module selection defines - They are no longer needed julius 5295d 23h /
258 Big OR1200 update - FPU, data cache write-back added, spec updated, ODT format doc now main one, default config set to both caches 8K, all integer arithmetic, FPU off julius 5295d 23h /
257 Changed or1200 supplementary manual from referring or or1200v2 to be just for the or1200 in general julius 5296d 09h /
256 Linux patch update - disabled SCET driver by default julius 5297d 04h /
255 Linux patch update with USB host data cache issue solved, file formatting fixed julius 5299d 06h /
254 Update of Linux patch with USB driver, rename of its or1ksim config file julius 5299d 23h /
253 No need to define PROTOTYPES, now DWARF 2 debugging is the default. jeremybennett 5300d 10h /

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