OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] - Rev 486

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
486 Updated with new opcodes to generate random numbers and to identify us as Or1ksim. jeremybennett 5057d 02h /
485 Use variable names in help text to describe default options olof 5057d 21h /
484 ORPSoC update - adding ability to use a Modelsim without vopt executable julius 5060d 15h /
483 ORPSoC OR1200 update. Adding parity testbench and generic fault tolerance testing build. julius 5060d 18h /
482 ORPSoC updates - adding parity checking RTL, ethernet MAC FIFO buffer updates. Software changes. julius 5065d 12h /
481 OR1200 Update. RTL and spec. julius 5065d 16h /
480 ORPSoC updates - ml501 project cleanups, DDR2 cache bug fixes. julius 5066d 14h /
479 ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. julius 5067d 13h /
478 ORPSoC update - ml501 or1200 cache configuration set to maximum, some cleanups. julius 5069d 05h /
477 ORPSoC update - Added ability to enable OR1200 caches up to 32KB, which requires line size of 32bytes and 8-beat Wishbone bursts.
Changed cache sizes of both instruction and data cache of reference design to 4kB each.		 julius 5069d 13h /
476 ORPSoC updates. Added 16kB cache options to OR1200, now as default on reference design. Cleaned up simulation Makefile more. julius 5070d 06h /
475 ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. julius 5070d 09h /
474 uC/OS-II port linker flags updated. julius 5070d 15h /
473 Fix typos in tool chain build script. Add build script for BusyBox/uClibc/Linux. Delete obsolete scripts, improve board description for test, add -pthread flag to GCC for Linux. jeremybennett 5071d 09h /
472 Various changes which improve the quality of the tracing. jeremybennett 5071d 11h /
471 Adding ucos-ii port. julius 5073d 14h /
470 ORPSoC OR1200 crt0 updates. julius 5074d 09h /
469 newlib update - added zeroing of r0 to crt0.S julius 5075d 10h /
468 ORPSoC update:
Added USER_ELF and USER_VMEM options to reference design simulation scripts.
Changed use of absolute BOARD_PATH variable to simply BOARD relative to board path
ML501's board.h bootrom default now boot from SPI		 julius 5075d 10h /
467 ORPmon - bug fixes and clean up. julius 5076d 08h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.