OpenCores
URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] - Rev 87

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
87 Updated acording to RTL changes. mihad 7819d 05h /
86 Entered the option to disable no response counter in wb master. mihad 7819d 05h /
85 Changed Vendor ID defines. mihad 7819d 09h /
84 Changed vendor ID. mihad 7823d 03h /
83 Cleaned up the code. No functional changes. mihad 7848d 02h /
82 This commit was manufactured by cvs2svn to create tag 'rel_5'. 7861d 22h /
81 Updated synchronization in top level fifo modules. mihad 7861d 22h /
80 This commit was manufactured by cvs2svn to create tag 'rel_4'. 7865d 03h /
79 Updated. mihad 7865d 03h /
78 Old files with wrong names removed. mihad 7865d 03h /
77 Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed. mihad 7865d 03h /
76 TRDY output delay was 10 instead of 11. Repaired. mihad 7868d 03h /
75 Include statement moved out of off/on pragma as reported by Uwe. mihad 7871d 04h /
74 This commit was manufactured by cvs2svn to create tag 'rel_3'. 7871d 04h /
73 Bug fixes, testcases added. mihad 7871d 04h /
72 *** empty log message *** mihad 7918d 08h /
71 Changed the code a bit to make it more readable.
Functionality not changed in any way.
More robust synchronization in fifos is still pending.
mihad 7926d 00h /
70 This commit was manufactured by cvs2svn to create tag 'rel_2'. 7963d 07h /
69 Changed BIST signal names etc.. mihad 7963d 07h /
68 Changed wrong signal name scanb_sen into scanb_en. tadejm 7966d 17h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.