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Subversion Repositories usb_dongle_fpga

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Rev Log message Author Age Path
24 Added changes for new dongle HW code 5 features nuubik 5955d 13h /
23 Inlined dongle spesific Uspp code to dongle.py script separate Uspp is no longer needed.
Forced serial port to hw flow control mode.
Added support for new dongle HW code 5 to support fast read and fast write modes		 nuubik 5955d 13h /
22 Inlined dongle spesific Uspp code to dongle.py script separate Uspp is no longer needed nuubik 5955d 13h /
21 This commit was manufactured by cvs2svn to create tag 'version_1_4'. 5968d 15h /
20 Fix'ed TAR cycle second part this is not critical update nuubik 5968d 15h /
19 Fix'ed cycle type init code copy/pase mistake nuubik 5968d 17h /
18 Fixed in reset init of some trigers (this should not have generated extra hardware in FPGA but just to be on the safe side) nuubik 5969d 17h /
17 changed version code to 04 and added spy mode by puting jumpers on header and also implemented LPC Firmware Hub read to enable this booting mode (selectable by header jumper see documentation) nuubik 5969d 17h /
16 Synchronisation with OpenCores release nuubik 6102d 14h /
15 changed version code to 03 and disabled spy mode on juper setting 00 (this disabled booting but postcode IO write was displayed) nuubik 6219d 16h /
14 added comment on POR time influence when booting from LPC dongle nuubik 6231d 16h /
13 This commit was manufactured by cvs2svn to create tag 'SoftVersion_1_1'. 6333d 09h /
12 Added windows py bindings check with nice info print with link to installer nuubik 6333d 09h /
11 one ; in line end possible runtime error nuubik 6333d 09h /
10 fixed a typo nuubik 6337d 07h /
9 Made failing on port open retry nuubik 6337d 07h /
8 Added PCB level test options nuubik 6337d 15h /
7 Fixed pin modes and resyntesized nuubik 6337d 15h /
6 Fixed Cyclon part no in datasheets and drawings nuubik 6374d 12h /
5 This commit was manufactured by cvs2svn to create tag 'HWVersion_1_0'. 6400d 08h /

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