OpenCores
URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] - Rev 137

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
137 change to fit xrom. simont 7720d 09h /
136 registering outputs. simont 7720d 09h /
135 prepared start of receiving if ren is not active. simont 7726d 08h /
134 fix bug in case execution of two data dependent instructions. simont 7726d 08h /
133 fix bug in substraction. simont 7726d 11h /
132 change branch instruction execution (reduse needed clock periods). simont 7730d 02h /
131 prepare programs for new timing. simont 7730d 02h /
130 prepared programs for new timing. simont 7730d 02h /
129 updated... simont 7730d 02h /
128 chance idat_ir to 24 bit wide simont 7739d 09h /
127 fix bug (cyc_o and stb_o) simont 7739d 09h /
126 define OC8051_XILINX_RAMB added simont 7739d 09h /
125 update, add prescaler, rclk, tclk. simont 7739d 09h /
124 add support for external rom from xilinx ramb4 simont 7739d 09h /
123 fiz bug iv pcs operation. simont 7741d 05h /
122 deifne OC8051_ROM added simont 7744d 09h /
121 Change pc add value from 23'h to 16'h simont 7744d 09h /
120 defines for pherypherals added simont 7745d 06h /
119 remove signal sbuf_txd [12:11] simont 7745d 10h /
118 change wr_sft to 2 bit wire. simont 7746d 03h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.