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URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

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Rev Log message Author Age Path
40 added sigals for interacting with external ram simont 7959d 10h /
39 added signals ack, stb and cyc simont 7966d 08h /
38 fix some bugs simont 7966d 08h /
37 added signals ack, stb and cyc simont 7966d 09h /
36 fix bugs in mode 0 simont 7966d 09h /
35 design docunemt simont 7967d 07h /
34 specification docunemt simont 7967d 07h /
33 fix some bugs simont 7967d 12h /
32 overflow repaired simont 7967d 13h /
31 fix some bugs simont 7974d 05h /
30 mode 1 and 3 divide clooak with 31 or 16, mode 2 with 64 or 32 simont 7977d 12h /
29 fix some bugs simont 7977d 12h /
28 remove syn signal simont 7977d 13h /
27 fix some bugs simont 7977d 13h /
26 main divider logic was optimized not optimized by compiler, so I did it by hand markom 7977d 15h /
25 divider and multiplier pass test markom 7978d 09h /
24 intensively tests all instructions markom 7978d 14h /
23 mul & div use 4 clocks simont 7979d 04h /
22 fix some bugs simont 7979d 04h /
21 mul bug fixed markom 7979d 10h /

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