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URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

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Rev Log message Author Age Path
82 replace some modules simont 7838d 07h /
81 initial import simont 7838d 07h /
80 removing unused modules simont 7838d 07h /
79 initial import simont 7838d 07h /
78 alu with registered outputs simont 7898d 07h /
77 substitute modules oc8051_ram_wr_sel and oc8051ram_rd_sel with oc8051_ram_addr_sel simont 7907d 03h /
76 add module oc8051_sfr, 256 bytes internal ram simont 7907d 04h /
75 initial import simont 7907d 04h /
74 add module oc8051_wb_iinterface simont 7915d 04h /
73 initial import simont 7915d 04h /
72 fix bug in interface to external data ram simont 7915d 06h /
71 add cache simont 7919d 06h /
70 initial import simont 7919d 06h /
69 add parameters simont 7919d 07h /
68 add instruction cache and DELAY parameters for external ram, rom simont 7919d 07h /
67 add parameters for instruction cache simont 7919d 07h /
66 added xrom_test simont 7920d 04h /
65 add oc8051_icache and oc8051_cache_ram simont 7920d 04h /
64 signal es_int=1'b0 simont 7920d 04h /
63 initial import simont 7920d 04h /

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