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URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

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Rev Log message Author Age Path
95 updating... simont 7751d 01h /
94 fix bug. simont 7751d 01h /
93 OC8051_XILINX_RAM added simont 7751d 01h /
92 initial inport simont 7751d 01h /
91 *** empty log message *** simont 7751d 01h /
90 change module name. simont 7755d 18h /
89 Replaced oc8051_ram by generic_dpram. rherveille 7816d 22h /
88 fix bugs simont 7821d 22h /
87 add include oc8051_defines.v simont 7821d 22h /
86 initial input simont 7821d 23h /
85 prepare bugs simont 7821d 23h /
84 remove wb_bus_mon simont 7829d 22h /
83 replace some modules simont 7829d 22h /
82 replace some modules simont 7829d 22h /
81 initial import simont 7829d 22h /
80 removing unused modules simont 7829d 22h /
79 initial import simont 7829d 22h /
78 alu with registered outputs simont 7889d 22h /
77 substitute modules oc8051_ram_wr_sel and oc8051ram_rd_sel with oc8051_ram_addr_sel simont 7898d 19h /
76 add module oc8051_sfr, 256 bytes internal ram simont 7898d 19h /

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