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URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] - Rev 97

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Rev Log message Author Age Path
97 initial inport simont 7773d 08h /
96 initial import simont 7773d 08h /
95 updating... simont 7773d 09h /
94 fix bug. simont 7773d 09h /
93 OC8051_XILINX_RAM added simont 7773d 09h /
92 initial inport simont 7773d 09h /
91 *** empty log message *** simont 7773d 09h /
90 change module name. simont 7778d 02h /
89 Replaced oc8051_ram by generic_dpram. rherveille 7839d 06h /
88 fix bugs simont 7844d 06h /
87 add include oc8051_defines.v simont 7844d 06h /
86 initial input simont 7844d 06h /
85 prepare bugs simont 7844d 06h /
84 remove wb_bus_mon simont 7852d 05h /
83 replace some modules simont 7852d 05h /
82 replace some modules simont 7852d 06h /
81 initial import simont 7852d 06h /
80 removing unused modules simont 7852d 06h /
79 initial import simont 7852d 06h /
78 alu with registered outputs simont 7912d 06h /

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