URL https://opencores.org/ocsvn/RISCMCU/RISCMCU/trunk

Subversion Repositories RISCMCU

[/] - Rev 20

Rev	Log message	Author	Age	Path
20	a simple demo program that output 3, 2, 1 to port b, c and d with different way.	yapzihe	7992d 01h	/
19	1. Remove the use of frequency divider 2. Uses the same external interrupt pin and timer external clock source pin as AT90S1200 3. Adds some comments to each module instantation.	yapzihe	7993d 22h	/
18	no message	yapzihe	8000d 14h	/
17	RISCMCU Slides Presentation (PDF, 112 KB)	yapzihe	8006d 06h	/
16	RISCMCU Thesis (PDF, 669 KB)	yapzihe	8006d 06h	/
15	rename file to RISCMCU_Thesis.pdf	yapzihe	8006d 06h	/
14	Thesis (PDF 668KB)	yapzihe	8006d 18h	/
13	removed old version	yapzihe	8006d 18h	/
12	RISCMCU THESIS (PDF, 668KB)	yapzihe	8006d 18h	/
11	My thesis for the RISCMCU project, in PDF	yapzihe	8008d 23h	/
10	hex2mif is used to convert HEX file to MIF format	yapzihe	8008d 23h	/
9	Real applications for testing the microcontroller	yapzihe	8008d 23h	/
8	move all the VHDL files to here from 'RISCMCU' directory	yapzihe	8008d 23h	/
7	move to 'vhdl' directory	yapzihe	8008d 23h	/
6	This commit was manufactured by cvs2svn to create tag 'arelease'.		8025d 17h	/
5	no message	yapzihe	8025d 17h	/
4	I have rearranged some of the codes and added some comments to reflect more clearly what I write in my thesis. It is not tested with the FLEX10K.	yapzihe	8025d 17h	/
3	Change the 3 level deep hardware stack to 4 level	yapzihe	8025d 17h	/
2	no message	yapzihe	8025d 17h	/
1	Standard project directories initialized by cvs2svn.		8025d 17h	/