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Rev Log message Author Age Path
40 Added wishbone bus jitter testing option.
Cleaned up waveform log .do files, now seperate files for a23 and a25 cores.
Added vmlinux executable elf file for running on hardware.
csantifort 4780d 22h /
39 Added a second level of buffering to a25_wishbone_buf to fix a lockup
bug when write acks to not return immediately, and also to improve performance slightly
csantifort 4781d 23h /
38 support 128-bit wishbone now used for a25 core csantifort 4782d 23h /
37 128-bit wide boot memory module csantifort 4783d 21h /
36 Changed boot_mem for the a25 system to be 128 bits wide to match the 128-bit wide wishbone bus csantifort 4783d 22h /
35 Amber25 improvements:
Use 128-bit wishbone bus, instead of 32-bit to reduce cache miss fetch times
Use a fast barrel shifter for shifts between 0 and 4 to improve timing
Use a 2 cycle full barrel shifter for complex shifts
csantifort 4785d 05h /
34 Tweaked strcpy function to speed it up slightly csantifort 4786d 02h /
33 Fixed bug in div assembly function. Handles negative numbers correctly.
Fixed bug in printf function, negative numbers now print correctly.
csantifort 4786d 22h /
32 Added clock cycle counting register to test_module to support dhrystone performance measurement csantifort 4787d 22h /
31 Added dhrystone benchmark test csantifort 4787d 23h /
30 Bug fix - a write access was sometimes dropped when it was in a sequence of writes with variable wb_ack delays csantifort 4801d 05h /
29 Use lgo command for saving waveforms in modelsim csantifort 4802d 23h /
28 Moved function prototypes to .h file csantifort 4802d 23h /
27 Got working with cadence nc simulator csantifort 4836d 06h /
26 Added wish list csantifort 4841d 06h /
25 Bug fix: boot-loader.mem became larger that the allowed 8k byte boot mem size.
Removed a struct in elfsplitter.c thats only used for debug - this reduced boot-loader.mem enough so that it fits again.
Tidy up: Removed a debug message from hw/tools/run.sh
csantifort 4843d 03h /
24 Added instructions how to build Linux kernel from source files csantifort 4845d 04h /
23 Split the source files list into a Vertex-6 only list and a Spartan-6 only list.
That way users don;t need to delete files from the list manually if they only have
a setup for one of the FPGA types.
csantifort 4845d 05h /
22 Added files and instructions to enable the building of the vmlinux image from the kernel source files. csantifort 4849d 04h /
21 Fixed bug in the conditions to create the FPGA configuration log file. I added the creation of the log file in the last release, but the way it was implemented was causing the Makefile to always rebuild from the start. csantifort 4849d 04h /

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