URL https://opencores.org/ocsvn/amber/amber/trunk

Subversion Repositories amber

[/] - Rev 61

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Rev	Log message	Author	Age	Path
61	Add new netowkr based boot loader. Remove support for Virtex. Spartan 6 only now.	csantifort	4354d 21h	/
60	Bug fix; removed a combinational loop from the a25_decode logic.	csantifort	4572d 17h	/
59	Added modelsim script for reloading a wlf file after a simulation has been rerun.	csantifort	4642d 15h	/
58	Use TB.clk_count for the decompiler messages and removed the local counter	csantifort	4642d 18h	/
57	Add some debug messages	csantifort	4642d 18h	/
56	Remove the timeouts file from svn. Its an output file and gets now just gets created automatically when sims are run for the first time.	csantifort	4642d 18h	/
55	Added sudo to rm mnt command	csantifort	4642d 19h	/
54	Bug fix for bug reported by Botao Lee. The mode bits in the decode stage did not change immediately after a mode switch from a teqp instruction, but 1 cycle later. This meant the wrong set of registers was selected for writing to for 1 clock cycle.	csantifort	4659d 18h	/
53	Cleaned up Amber Verilog, removing unused signals.	csantifort	4674d 16h	/
52	Fixed typo in notes on creating DDR memory interfaces using coregen	csantifort	4674d 16h	/
51	Revert vmlinux back to 48.	csantifort	4715d 16h	/
50	Revert to previous version	csantifort	4715d 16h	/
49	Added a note n how to change timeouts	csantifort	4715d 16h	/
48	Fixed a bug in linux that caused the os to not return to the running application after an interrupt. Hello-world now runs stand-alone again. Added initrd-200k-dhry, a disk image that uses the dhry program for init.	csantifort	4719d 22h	/
47	Changed V6 VCo from 1000Mhz to 1200 MHz	csantifort	4739d 20h	/
46	svn ignore vmlinux.dis and vmlinux.mem	csantifort	4747d 18h	/
45	Store vmlinux.mem and vmlinux.dis in compressed form	csantifort	4747d 18h	/
44	Updated vmlinux image based on last change	csantifort	4747d 18h	/
43	Added support for the flat executable file format to vmlinux, so that the hello-world program is correctly relocated when it is loaded at the end of the vmlinux test. Changed the Virtex-5 clock configuration to use a 1200MHz VCO frequency and 80MHz system clock frequency.	csantifort	4747d 18h	/
42	Added write buffer - fixes bug if wishbone writes takes multiple cycles to complete	csantifort	4765d 15h	/

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Subversion Repositories amber

[/] - Rev 61

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