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Rev Log message Author Age Path
42 VC synthesis script ready wsong0210 4904d 08h /
41 vc synthesis scripts, initial version wsong0210 4904d 08h /
40 VC router HDL all cleaned up wsong0210 4904d 09h /
39 clean up the VC router wsong0210 4904d 09h /
38 clean up the VC router wsong0210 4905d 02h /
37 SDM/wormhole ready wsong0210 4905d 07h /
36 add simply description wsong0210 4905d 08h /
35 test bench ready wsong0210 4905d 09h /
34 debug wsong0210 4906d 09h /
33 debug wsong0210 4906d 10h /
32 currently debugging the simulation compiling wsong0210 4907d 07h /
31 test bench ongoing wsong0210 4908d 07h /
30 test bench cleaning up ongping wsong0210 4909d 07h /
29 begin the test environment wsong0210 4910d 07h /
28 merge the synthesis scripts in the branch init to trunk wsong0210 4910d 08h /
27 eliminate timing loops in all router architectures wsong0210 4910d 08h /
26 wormhole router compile OK wsong0210 4911d 08h /
25 resolve conflict wsong0210 4912d 02h /
24 make a branch wsong0210 4912d 02h /
23 try commit wsong0210 4912d 02h /

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