OpenCores
URL https://opencores.org/ocsvn/can/can/trunk

Subversion Repositories can

[/] - Rev 114

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
114 This commit was manufactured by cvs2svn to create tag 'rel_13'. 7641d 20h /
113 This commit was manufactured by cvs2svn to create tag 'rel_12'. 7641d 20h /
112 Tx and rx length are limited to 8 bytes regardless to the DLC value. tadejm 7641d 20h /
111 Fixed according to the linter.
Case statement for data_out joined.
mohor 7643d 20h /
110 Fixed according to the linter. mohor 7643d 20h /
109 Fixed according to the linter. mohor 7643d 22h /
108 Fixed according to the linter. mohor 7643d 22h /
107 Fixed according to the linter. mohor 7643d 22h /
106 Unused signal removed. mohor 7649d 20h /
105 This commit was manufactured by cvs2svn to create tag 'rel_11'. 7650d 10h /
104 Synchronization fixed. In some strange cases it didn't work according to
the VHDL reference model.
tadejm 7650d 10h /
103 This commit was manufactured by cvs2svn to create tag 'complete_1'. 7653d 00h /
102 Little fixes (to fix warnings). mohor 7653d 00h /
101 This commit was manufactured by cvs2svn to create tag 'rel_10'. 7657d 02h /
100 Synchronization changed. mohor 7657d 02h /
99 PCI_BIST replaced with CAN_BIST. mohor 7657d 02h /
98 This commit was manufactured by cvs2svn to create tag 'rel_9'. 7662d 13h /
97 Overrun fifo implemented with FFs, because it is not possible to create such a memory. simons 7662d 13h /
96 This commit was manufactured by cvs2svn to create tag 'rel_8'. 7662d 15h /
95 Virtual silicon ram instances added. simons 7662d 15h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.