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[/] - Rev 57

Rev	Log message	Author	Age	Path
57	Mux used for clkout to avoid "gated clocks warning".	mohor	7780d 19h	/
56	Doubled declarations removed.	mohor	7781d 18h	/
55	wire declaration added.	mohor	7781d 18h	/
54	This commit was manufactured by cvs2svn to create tag 'branch-release-1-0'.		7786d 20h	/
53	CAN pins located.	mohor	7786d 20h	/
52	tx_o is now tristated signal. tx_oen and tx_o combined together.	mohor	7786d 20h	/
51	Xilinx RAM added.	mohor	7786d 20h	/
50	Top level signal names changed.	mohor	7786d 21h	/
49	Actel APA ram changed. Now synchronous read is used.	mohor	7790d 12h	/
48	Actel APA ram supported.	mohor	7790d 13h	/
47	Data is latched on read.	mohor	7790d 13h	/
46	This commit was manufactured by cvs2svn to create tag 'rel_1'.		7800d 11h	/
45	When a dominant bit was detected at the third bit of the intermission and node had a message to transmit, bit_stuff error could occur. Fixed.	mohor	7800d 11h	/
44	When bit error occured while active error flag was transmitted, counter was not incremented.	mohor	7800d 12h	/
43	Directory keeper.	mohor	7800d 19h	/
42	Initial version of the project.	mohor	7800d 19h	/
41	Incomplete sensitivity list fixed.	mohor	7800d 20h	/
40	Typo fixed.	mohor	7800d 20h	/
39	CAN core finished. Host interface added. Registers finished. Synchronization to the wishbone finished.	mohor	7800d 21h	/
38	Temporary backup version (still fully operable).	mohor	7802d 11h	/