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Rev Log message Author Age Path
67 CAN interrupt is active low. mohor 7803d 12h /
66 unix. mohor 7809d 06h /
65 unix. mohor 7809d 06h /
64 *** empty log message *** mohor 7809d 06h /
63 ALE changes on negedge of clk. mohor 7815d 04h /
62 can_cs signal used for generation of the cs. mohor 7815d 04h /
61 Bidirectional port_0_i changed to port_0_io.
input cs_can changed to cs_can_i.
mohor 7817d 17h /
60 rd_i and wr_i are active high signals. If 8051 is connected, these two signals
need to be negated one level higher.
mohor 7817d 19h /
59 8051 interface added (besides WISHBONE interface). Selection is made in
can_defines.v file.
mohor 7817d 19h /
58 timescale.v is used for simulation only. mohor 7818d 07h /
57 Mux used for clkout to avoid "gated clocks warning". mohor 7818d 07h /
56 Doubled declarations removed. mohor 7819d 06h /
55 wire declaration added. mohor 7819d 06h /
54 This commit was manufactured by cvs2svn to create tag 'branch-release-1-0'. 7824d 08h /
53 CAN pins located. mohor 7824d 08h /
52 tx_o is now tristated signal. tx_oen and tx_o combined together. mohor 7824d 08h /
51 Xilinx RAM added. mohor 7824d 08h /
50 Top level signal names changed. mohor 7824d 08h /
49 Actel APA ram changed. Now synchronous read is used. mohor 7828d 00h /
48 Actel APA ram supported. mohor 7828d 00h /

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