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Rev Log message Author Age Path
145 Support for 2 CPUs added. igorm 7372d 02h /
144 Port names and defines for the supported CPUs changed. igorm 7372d 03h /
143 Signals for easier debugging removed. igorm 7372d 05h /
142 Typo fixed. igorm 7372d 06h /
141 data_cnt_lim length changed to reduce number of warnings. igorm 7373d 01h /
140 CRC checking of incoming CRC added to all tasks. igorm 7373d 16h /
139 New release of the debug interface (3rd. release). igorm 7375d 19h /
138 Temp version before changing dbg interface. igorm 7381d 23h /
137 This commit was manufactured by cvs2svn to create tag 'rel_22'. 7386d 00h /
136 Table describing chain codes added. igorm 7386d 00h /
135 'hz changed to 1'hz because Icarus complains. igorm 7388d 23h /
134 This commit was manufactured by cvs2svn to create tag 'rel_21'. 7389d 22h /
133 This commit was manufactured by cvs2svn to create tag 'highland_ver1'. 7389d 22h /
132 Documentation updated. Many missing things added. igorm 7389d 22h /
131 Documentation updated. Many missing things added. igorm 7389d 22h /
130 This commit was manufactured by cvs2svn to create tag 'rel_20'. 7431d 21h /
129 New documentation. mohor 7431d 21h /
128 Defines WISHBONE_SUPPORTED and CPU_SUPPORTED added. By default both are
turned on.
mohor 7434d 05h /
127 This commit was manufactured by cvs2svn to create tag 'rel_19'. 7437d 04h /
126 run_sim.scr renamed to run_sim for VATS. mohor 7437d 04h /

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