URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] - Rev 227

Rev	Log message	Author	Age	Path
227	Changed BIST scan signals.	tadejm	8052d 06h	/
226	Igor added WB burst support and repaired BUG when handling TX under-run and retry.	tadejm	8052d 08h	/
225	Some minor changes.	tadejm	8052d 08h	/
224	Signals for a wave window in Modelsim.	tadejm	8052d 09h	/
223	Some code changed due to bug fixes.	tadejm	8052d 09h	/
222	This commit was manufactured by cvs2svn to create tag 'rel_6'.		8056d 07h	/
221	TxStatus is written after last access to the TX fifo is finished (in case of abort or retry). TxDone is fixed.	mohor	8056d 07h	/
220	This commit was manufactured by cvs2svn to create tag 'rel_5'.		8059d 08h	/
219	txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file, TxDone and TxRetry are generated after the current WISHBONE access is finished.	mohor	8059d 08h	/
218	Typo error fixed. (When using Bist)	mohor	8059d 10h	/
217	Bist supported.	mohor	8059d 10h	/
216	Bist signals added.	mohor	8059d 10h	/
215	Bist supported.	mohor	8059d 11h	/
214	Signals for WISHBONE B3 compliant interface added.	mohor	8060d 07h	/
213	Defines changed to have ETH_ prolog. ETH_WISHBONE_B# define added.	mohor	8060d 07h	/
212	Minor $display change.	mohor	8060d 07h	/
211	Bist added.	mohor	8060d 07h	/
210	BIST added.	mohor	8060d 07h	/
209	Just back-up; not completed testbench and some testcases are not wotking properly yet.	tadejm	8061d 10h	/
208	Virtual Silicon RAMs moved to lib directory	tadej	8077d 04h	/