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Rev	Log message	Author	Age	Path
243	Late collision is not reported any more.	tadejm	7885d 10h	/
242	Late collision is reported only when not in the full duplex. Sample is taken (for status) as soon as MRxDV is not valid (regardless of the received byte cnt).	tadejm	7886d 01h	/
241	StartIdle state changed (not important the size of the packet). StartData1 activates only while ByteCnt is smaller than the MaxFrame.	tadejm	7886d 01h	/
240	All modules are reset with wb_rst instead of the r_Rst. Exception is MII module.	tadejm	7886d 01h	/
239	RxError is not generated when small frame reception is enabled and small frames are received.	tadejm	7886d 01h	/
238	Defines fixed to use generic RAM by default.	mohor	7898d 05h	/
237	This commit was manufactured by cvs2svn to create tag 'rel_9'.		7900d 10h	/
236	State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery.	mohor	7900d 10h	/
235	rev 4.	mohor	7901d 01h	/
234	Figure list assed to the revision 3.	mohor	7901d 09h	/
233	Revision 0.3 released. Some figures added.	mohor	7901d 09h	/
232	fpga define added.	mohor	7906d 04h	/
231	Description of Core Modules added (figure).	mohor	7908d 06h	/
230	This commit was manufactured by cvs2svn to create tag 'rel_8'.		7912d 02h	/
229	case changed to casex.	mohor	7912d 02h	/
228	This commit was manufactured by cvs2svn to create tag 'rel_7'.		7912d 06h	/
227	Changed BIST scan signals.	tadejm	7912d 06h	/
226	Igor added WB burst support and repaired BUG when handling TX under-run and retry.	tadejm	7912d 08h	/
225	Some minor changes.	tadejm	7912d 08h	/
224	Signals for a wave window in Modelsim.	tadejm	7912d 09h	/

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[/] - Rev 243

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