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Rev Log message Author Age Path
339 Added basic support for Icarus Verilog olof 4716d 13h /
338 root 5508d 19h /
337 root 5564d 21h /
336 Added old uploaded documents to new repository. root 5566d 00h /
335 New directory structure. root 5566d 00h /
334 Minor fixes for Icarus simulator. igorm 7014d 02h /
333 Some small fixes + some troubles fixed. igorm 7014d 14h /
332 Case statement improved for synthesys. igorm 7027d 19h /
331 Tests for delayed CRC and defer indication added. igorm 7042d 21h /
330 Warning fixes. igorm 7042d 21h /
329 Defer indication fixed. igorm 7042d 23h /
328 Delayed CRC fixed. igorm 7042d 23h /
327 Defer indication fixed. igorm 7042d 23h /
326 Delayed CRC fixed. igorm 7042d 23h /
325 Defer indication fixed. igorm 7043d 00h /
324 This commit was manufactured by cvs2svn to create tag 'rel_27'. 7340d 00h /
323 Accidently deleted line put back. igorm 7340d 00h /
322 This commit was manufactured by cvs2svn to create tag 'rel_26'. 7343d 19h /
321 - Bug connected to the TX_BD_NUM_Wr signal fixed (bug came in with the
previous update of the core.
- TxBDAddress is set to 0 after the TX is enabled in the MODER register.
- RxBDAddress is set to r_TxBDNum<<1 after the RX is enabled in the MODER
register. (thanks to Mathias and Torbjorn)
- Multicast reception was fixed. Thanks to Ulrich Gries
igorm 7343d 19h /
320 TX_BD_NUM_Wr error fixed. Error was entered with the last check-in. igorm 7343d 23h /

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