URL https://opencores.org/ocsvn/iso7816_3_master/iso7816_3_master/trunk

Subversion Repositories iso7816_3_master

[/] - Rev 13

Rev	Log message	Author	Age	Path
13	Corrections in analyzer to handle TDi and historical bytes in ATR and PPS todo: handle inverse convention	acapola	4895d 15h	/
12	pps sequence added to test bench endOfTx added to TxCore	acapola	4906d 12h	/
11	added BSD licence header to files	acapola	4906d 16h	/
10	communication direction probe added	acapola	4906d 17h	/
9	parity convention fixed	acapola	4912d 13h	/
8		acapola	4914d 12h	/
7	- rx/tx use "cyclesPerEtu" input - "stopBit" status bit timing fixed - analyzer: "lastByte" and "bytesCnt" functional	acapola	4915d 12h	/
6	analyzer added to test bench, not functional yet...	acapola	4916d 12h	/
5	draft of t=0 protocol analyzer (to ease debuging, and eventually as an ip itself)	acapola	4917d 12h	/
4	Basic test bench completed for T=0: a card send ATR, reader send a command TODO: add cycles/ETU management (start at 372, then adjust in case of PPS...)	acapola	4918d 13h	/
3	initial draft, not functional yet	acapola	4925d 13h	/
2		acapola	4925d 15h	/
1	The project and the structure was created	root	4926d 11h	/