OpenCores
URL https://opencores.org/ocsvn/light8080/light8080/trunk

Subversion Repositories light8080

[/] - Rev 34

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
34 rs232 sanitized and parametrized ja_rd 5466d 23h /
33 Added old uploaded documents to new repository. root 5597d 13h /
32 Added old uploaded documents to new repository. root 5598d 02h /
31 New directory structure. root 5598d 02h /
30 hexconv.pl nmoved to /asm, where it is actually used ja_rd 5618d 08h /
29 File list updated with new files ja_rd 5618d 08h /
28 These CP/M assembler output files are no longer used
because CP/M assembler is no longer used
ja_rd 5618d 08h /
27 Brief instructions for batch script ja_rd 5618d 08h /
26 Builds test bench from vhdl template and assembly source
relies on TASM to do the assembly
ja_rd 5618d 08h /
25 Moved from /util
Added comments and generally improved options
ja_rd 5618d 08h /
24 Totally changed -- tests interrupts using simulated interrupt controller in hdl test bench
Code reformatted for TASM
ja_rd 5618d 08h /
23 Code reformatted for TASM ja_rd 5618d 08h /
22 Totally changed -- vhdl code generated from a template
Interrupts tested from software using a simulated interrupt controller
ja_rd 5618d 08h /
21 Totally changed -- vhdl code generated from a template ja_rd 5618d 08h /
20 VHDL template for test benches ja_rd 5618d 08h /
19 Fixed a bug (intr pulses longer than 1 clock cycle failed in some circumstances)
Added an output to the core to mark the fetch cycle of all instructions
Started to add timing diagrams
ja_rd 5618d 08h /
18 Uncluttered the signal display a bit ja_rd 5618d 08h /
17 Comments added ja_rd 5704d 11h /
16 adding LST filed generated by TASM ja_rd 5704d 11h /
15 Names and contents of some files changed ja_rd 5704d 11h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.