URL https://opencores.org/ocsvn/mem_ctrl/mem_ctrl/trunk

Subversion Repositories mem_ctrl

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Rev	Log message	Author	Age	Path
24	* empty log message *	rudi	8332d 10h	/
23	* empty log message *	rudi	8332d 10h	/
22	Fixed several minor bugs, cleaned up the code further ...	rudi	8332d 11h	/
21	Updated Spec ...	rudi	8338d 22h	/
20	- Fixed combinatorial loops in synthesis - Fixed byte select bug	rudi	8363d 18h	/
19	* empty log message *	rudi	8372d 17h	/
18	- Made some changes not to expect clock during reset ...	rudi	8373d 21h	/
17	- Updated Documentation - More Synthesis cleanup, mostly for speed - Several bug fixes - Changed code to avoid auto-precharge and burst-terminate combinations (apparently illegal ?) Now we will do a manual precharge ...	rudi	8385d 21h	/
16	- More Synthesis cleanup, mostly for speed - Several bug fixes - Changed code to avoid auto-precharge and burst-terminate combinations (apparently illegal ?) Now we will do a manual precharge ...	rudi	8385d 21h	/
15	Just minor test bench update, syncing all the files.	rudi	8401d 23h	/
14	Minor fixes to testbench ...	rudi	8403d 22h	/
13	Fixed Register reads Tightened up timing for register rd/wr	rudi	8441d 20h	/
12	Changed Reset to be active high and async.	rudi	8451d 23h	/
11	* empty log message *	rudi	8465d 10h	/
10	Fixed the TMS register setup to be tight and correct.	rudi	8473d 21h	/
9	Many fixes for minor bugs that showed up in gate level simulations.	rudi	8473d 21h	/
8	- Changed IO names to be more clear. - Uniquifyed define names to be core specific. - Removed "Refresh Early" configuration	rudi	8496d 15h	/
7	Added Directory Tree Description to README file	rudi	8499d 15h	/
6	Added Memory controller spec	rudi	8508d 15h	/
5	* empty log message *	rudi	8508d 16h	/

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Subversion Repositories mem_ctrl

[/] - Rev 24

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