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Subversion Repositories minimips_superscalar

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21 Correcting codes that work in behavioral simulation but cause problems with implementation. There must be more to be corrected yet. In analysis ... mcafruni 1543d 18h /
20 I've uncommented wait statement so that the benchmark to be loaded into the simulation. mcafruni 1578d 07h /
19 mcafruni 1911d 23h /
18 clock_gate.vhd: removed.
minimips.vhd: Clock2 input is wrongly connected to the clock signal (Do not ask me how that happened. I'm sorry.). The right thing is to be connected to the clock2 signal. Adjusted.		 mcafruni 1911d 23h /
17 Removing unnecessary clock-gate architecture. mcafruni 1912d 00h /
16 FIR filter with 36 coefficients. (binary to run) mcafruni 1945d 08h /
15 FIR filter with 36 coefficients. mcafruni 1945d 08h /
14 Buble Sort algorithm. Four totally disorderly numbers are sorted in ascending order. Worst performance algorithm. mcafruni 1949d 03h /
13 Buble Sort algorithm. Four totally disorderly numbers are sorted in ascending order. Worst performance algorithm. mcafruni 1949d 03h /
12 Static Fast Fourier Transform COOLEY TUKEY algorithm to 8 samples. The signal must have zeros betwen non null samples to prevent multiplication by real and complex numbers, since the core don't have floating point. mcafruni 1949d 03h /
11 Static Fast Fourier Transform COOLEY TUKEY algorithm to 8 samples. The signal must have zeros betwen non null samples to prevent multiplication by real and complex numbers, since the core don't have floating point. mcafruni 1949d 03h /
10 Matrix/Vector multiplication by constant. (binary) mcafruni 1959d 01h /
9 Matrix/Vector multiplication by constant. mcafruni 1959d 01h /
8 mcafruni 1990d 00h /
7 Uploading missing file 'pps_pf.vhd'. mcafruni 1990d 00h /
6 This is the assembly gasm modified that include a multiplication instruction which operands are 16-bit wide. mcafruni 2002d 13h /
5 6x6 Matrix multiplication (ingenuous algorithm)
msx.bin: uses 16-bit operands multiplication instruction (mult2 rd, rs, rt).
m6x.bin: uses 32-bit operands original multiplication instruction (mult rs, rt) and the move instruction (mflo rd) after.		 mcafruni 2002d 21h /
4 It needs to be tested on more useful and real benchmarks to reveal possible instruction sequences not supported by the architecture. Suggestions are welcome. mcafruni 2002d 21h /
3 mcafruni 2002d 21h /
2 mcafruni 2002d 21h /

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