URL https://opencores.org/ocsvn/miniuart2/miniuart2/trunk

Subversion Repositories miniuart2

[/] - Rev 24

Rev	Log message	Author	Age	Path
24	This commit was manufactured by cvs2svn to create tag 'arelease'.		7834d 18h	/
23	This commit was generated by cvs2svn to compensate for changes in r22, which included commits to RCS files with non-trunk default branches.	philippe	7834d 18h	/
22	no message	philippe	7834d 18h	/
21	This commit was manufactured by cvs2svn to create branch 'avendor'.		7834d 18h	/
20	This commit was generated by cvs2svn to compensate for changes in r19, which included commits to RCS files with non-trunk default branches.	philippe	7834d 18h	/
19	no message	philippe	7834d 18h	/
18	no message	philippe	7837d 18h	/
17	Header and formating modif modif on line 81: if (SampleCnt = 1 and BitPos >= 2) then -- Sample RxD on 1	philippe	7837d 18h	/
16	Header and formating modif	philippe	7837d 18h	/
15	changed mail address	philippe	7958d 18h	/
14	no message	philippe	8084d 22h	/
13	no message	philippe	8084d 22h	/
12	Asserted TxD High on power on. (Added the line TxD <= '1'). Otherwise, the transmitter start with the Tx line low.	philippe	8084d 22h	/
11	no message	philippe	8127d 22h	/
10	Prohibited SampleCnt to overflow over 3. (This is just a security-not needed for the design to reun correctly)	philippe	8127d 22h	/
9	Corrected bug on LoadA signal in Txunit.vhd. Load signal is now correctly sampled by BR_CLK.	philippe	8127d 22h	/
8	Modified and detailed the Baudrate tolerance section	philippe	8147d 20h	/
7	no message	philippe	8147d 20h	/
6	Modified signal names to match port map	philippe	8147d 20h	/
5	no message	philippe	8182d 20h	/