URL https://opencores.org/ocsvn/mlite/mlite/trunk

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[/] - Rev 11

Rev	Log message	Author	Age	Path
11	Added comment for DEBUG mode	rhoads	8316d 02h	/
10	Add pause_in to process dependency, fixes "lw $4,0($4)"	rhoads	8316d 02h	/
9	Support for generic_tpram dual-port RAM	rhoads	8321d 05h	/
8	Preparing to use dual-port memory for registers.	rhoads	8322d 03h	/
7	Made writes 4 cycles, improved mem_ctrl.vhd	rhoads	8327d 10h	/
6	JAL now correctly sets r31 to instruction AFTER branch delay slot. Fixed interrupts.	rhoads	8331d 08h	/
5	This commit was manufactured by cvs2svn to create tag 'Version_1_0'.		8550d 07h	/
4	Update web page	rhoads	8550d 07h	/
3	This commit was manufactured by cvs2svn to create tag 'arelease'.		8550d 08h	/
2	MIPS-lite CPU core	rhoads	8550d 08h	/
1	Standard project directories initialized by cvs2svn.		8550d 08h	/