OpenCores
URL https://opencores.org/ocsvn/mlite/mlite/trunk

Subversion Repositories mlite

[/] - Rev 114

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
114 Matthias Grunewald's changes to get synthesis to work with Synopsys' FPGA Compiler II. rhoads 7553d 21h /
113 Matthias Grunewald's bug fixes:
Branch and compare instructions didn't interpret immediate as signed.
rhoads 7553d 22h /
112 Merged Matthias Grunewald's changes to use tri-state for smaller Xilinx FPGA. rhoads 7553d 22h /
111 Updated to work with new convert.exe which updates opcodes to set $4, $5, and $sp. rhoads 7553d 22h /
110 support > 64kb memory with bss_start, bss_end, sp rhoads 7827d 18h /
109 support > 64kb memory with bss_start, bss_end, and sp rhoads 7827d 18h /
108 changed interrupt vector from 0x30 to 0x3c rhoads 7827d 18h /
107 merged rising_edge(clk) statements rhoads 7827d 18h /
106 better test mem_pause rhoads 7830d 20h /
105 better test mem_pause rhoads 7830d 20h /
104 use getchar() instead of getch() to be gcc friendly rhoads 7831d 19h /
103 shorten similation times rhoads 7831d 19h /
102 permit testing mem_pause rhoads 7831d 19h /
101 Correctly freeze the pipeline when mem_pause = '1' rhoads 7831d 20h /
100 test mult(a,-b) rhoads 7973d 19h /
99 correct upper 32-bits for mult(-1,-1) rhoads 7973d 19h /
98 Fix size of GENERIC ram. rhoads 7978d 18h /
97 added documentation rhoads 8042d 23h /
96 Simplify take_branch rhoads 8077d 01h /
95 register mem_write and mem_byte_sel for speed calculations rhoads 8077d 01h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.