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Rev Log message Author Age Path
123 Uncomment out the Altera portion. Xilinx users may need to re-comment out this section. rhoads 7405d 07h /
122 Added comment to explain why c_bus isn't delayed but reg_dest is delayed. rhoads 7469d 08h /
121 Added Matthias Gruenewald's tri-state area-optimized option rhoads 7480d 20h /
120 Make generics "GENERIC" rhoads 7480d 20h /
119 Opcodes from count.c rhoads 7519d 07h /
118 Merged Matthias Grunewald's changes to use tri-state for smaller Xilinx FPGA. rhoads 7519d 07h /
117 Part of Matthias Grunewald's changes to use tri-state for smaller Xilinx FPGA. rhoads 7519d 07h /
116 Matthias Grunewald's changes to use tri-state for smaller Xilinx FPGA. rhoads 7519d 07h /
115 Matthias Grunewald's changes for Xilinx FPGA dual-port RAM. rhoads 7519d 07h /
114 Matthias Grunewald's changes to get synthesis to work with Synopsys' FPGA Compiler II. rhoads 7519d 07h /
113 Matthias Grunewald's bug fixes:
Branch and compare instructions didn't interpret immediate as signed.
rhoads 7519d 07h /
112 Merged Matthias Grunewald's changes to use tri-state for smaller Xilinx FPGA. rhoads 7519d 07h /
111 Updated to work with new convert.exe which updates opcodes to set $4, $5, and $sp. rhoads 7519d 07h /
110 support > 64kb memory with bss_start, bss_end, sp rhoads 7793d 04h /
109 support > 64kb memory with bss_start, bss_end, and sp rhoads 7793d 04h /
108 changed interrupt vector from 0x30 to 0x3c rhoads 7793d 04h /
107 merged rising_edge(clk) statements rhoads 7793d 04h /
106 better test mem_pause rhoads 7796d 06h /
105 better test mem_pause rhoads 7796d 06h /
104 use getchar() instead of getch() to be gcc friendly rhoads 7797d 05h /

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