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Rev Log message Author Age Path
33 Added isr_enable(?) rhoads 8195d 13h /
32 ld -N; added pi.c rhoads 8195d 13h /
31 Calculate PI rhoads 8195d 13h /
30 fixed LWL and write to 0xffff and other bugs rhoads 8195d 13h /
29 setup $gp and zero bss, fixed a few test bugs rhoads 8195d 13h /
28 setup $gp and zero .sbss and .bss rhoads 8195d 13h /
27 Setup $gp and zero .sbss and .bss rhoads 8195d 13h /
26 Changed to gcc compiler. Strip off first 0x1000 bytes. rhoads 8197d 14h /
25 opcodes target rhoads 8197d 14h /
24 Disable interrupts upon reset. rhoads 8197d 14h /
23 Fixed div -x/y. rhoads 8197d 14h /
22 Switched to gcc compiler. rhoads 8197d 14h /
21 Moved startup to boot.asm rhoads 8197d 14h /
20 Startup code. rhoads 8197d 14h /
19 Changed simili run to 40us. rhoads 8199d 14h /
18 Fixed "divu $3,$4". "Div $3,$4" still has bug if $3*$4<0. rhoads 8199d 14h /
17 Fixed "blez $0,target". Made LWL=LW and SWL=SW. Changed tabs to spaces. rhoads 8199d 14h /
16 Fixed binary to HEX when the number of digits isn't a multiple of 4. rhoads 8199d 14h /
15 Test all MIPS I opcodes. rhoads 8199d 14h /
14 Fixed big-endian mode bugs rhoads 8203d 14h /

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