URL https://opencores.org/ocsvn/mlite/mlite/trunk

Subversion Repositories mlite

[/] - Rev 348

Rev	Log message	Author	Age	Path
348	Added comment for 32MB and 128MB DDR parts	rhoads	5626d 03h	/
347	Xilinx ISE Project file	rhoads	5626d 03h	/
346	Support optional 4KB cache	rhoads	5663d 03h	/
345	Commented out optional mult speedup	rhoads	5666d 23h	/
344	Fixed compiler warning	rhoads	5666d 23h	/
343	Initial working cache	rhoads	5666d 23h	/
342	Changed simple cache	rhoads	5666d 23h	/
341	Permit large file transfers when running on windows	rhoads	5666d 23h	/
340	Get the length of a file	rhoads	5666d 23h	/
339	Format output of ls	rhoads	5666d 23h	/
338	Fix filename problem with 9th file in directory	rhoads	5666d 23h	/
337	Initial attempt at a cache	rhoads	5672d 04h	/
336	Better support Linux	rhoads	5704d 21h	/
335	Use enable signal for byte_we	rhoads	5713d 22h	/
334	Short time for averaging read signal for 12.5 MHz case	rhoads	5723d 21h	/
333	Updated Altera lpm_ram_dp usage for Cyclone FPGAs	rhoads	5723d 21h	/
332	Updated Altera lpm_ram_dp	rhoads	5723d 21h	/
331	Commented out unconnected signals	rhoads	5784d 22h	/
330	Simplify sscanf()	rhoads	5794d 09h	/
329	Fix interrupt line comment	rhoads	5875d 20h	/