OpenCores
URL https://opencores.org/ocsvn/next186_soc_pc/next186_soc_pc/trunk

Subversion Repositories next186_soc_pc

[/] - Rev 10

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
10 Adlib/OPL3 for Nexys4 board ndumitrache 2601d 23h /
9 ndumitrache 2662d 17h /
8 Lattice Mach XO2 + SDRAM port (FleaFPGA) ndumitrache 3667d 19h /
7 Disable interrupts in VESAMemControl callback ndumitrache 3791d 18h /
6 ndumitrache 3971d 00h /
5 updated Next186 CPU ndumitrache 3971d 00h /
4 fix BIOS int 1ah (Get system time) ndumitrache 4002d 00h /
3 ndumitrache 4005d 02h /
2 ndumitrache 4005d 02h /
1 The project and the structure was created root 4005d 19h /

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.