| Rev |
Log message |
Author |
Age |
Path |
| 237 |
Found some errors in the comments and cleaned up unnecessary library references. |
jshamlet |
1494d 16h |
/ |
| 236 |
More software cleanup for the Open8_II project |
jshamlet |
1494d 17h |
/ |
| 235 |
Ok, this time with feeling. |
jshamlet |
1499d 11h |
/ |
| 234 |
Forgot to add documentation |
jshamlet |
1499d 13h |
/ |
| 233 |
Updated the Sample Projects.zip |
jshamlet |
1499d 13h |
/ |
| 232 |
More code cleanup on sample projects. SDLC2LCD should now match the Open8_II project model. |
jshamlet |
1508d 17h |
/ |
| 231 |
Updated sample projects and added elapsed time capture (chronometer) module |
jshamlet |
1508d 17h |
/ |
| 230 |
Added two sample projects that show how to connect and program an Open8 system |
jshamlet |
1512d 04h |
/ |
| 229 |
Created a new version of the system timer with 24-bit, 1-uS resolution. The new timer has a much different register interface, so it is now o8_sys_timer_ii. |
jshamlet |
1512d 15h |
/ |
| 228 |
Added an initialization constant for the OPEN8_BUS_TYPE record. |
jshamlet |
1513d 05h |
/ |
| 227 |
Added a demonstration Open8_cfg.vhd file, which is used to configure the system constants. It also provides a function that makes it easy to merge read buses. |
jshamlet |
1513d 12h |
/ |
| 226 |
Forgot the updated package file... |
jshamlet |
1513d 15h |
/ |
| 225 |
Added Halt_Ack to go with Halt_Req. |
jshamlet |
1513d 15h |
/ |
| 224 |
Finished new Open8 bus record, which now includes the clock, reset and a microsecond tick. The CPU now accepts a clock and pll_locked signal, which it uses to generate the system reset in the bus record. It also contains a simple microsecond counter to feed the usec_tick in the record. This logic was removed from the real time clock and system timer entities, which now use the global version. Bus connections should be dramatically simplified, as only the read logic and interrupts are still run as separate signals. |
jshamlet |
1513d 17h |
/ |
| 223 |
Added an OPEN8_BUS_TYPE record to simplify connection to Open8 modules. The CPU now passes and Open8_Bus out, which supplies the bus address, write enable, write data, and read enable. Read data and interrupts are still handled as separate signals, since they are muxed/connected at the next level up. |
jshamlet |
1514d 10h |
/ |
| 222 |
Created a modified version of the epoch timer with a 32-bit, 1-uS resolution timer/comparator. |
jshamlet |
1514d 16h |
/ |
| 221 |
o8_vdsm8.vhd now has a default value assigned at compile time, o8_register.vhd was cleaned up some more. |
jshamlet |
1515d 10h |
/ |
| 220 |
More revision sections added |
jshamlet |
1515d 11h |
/ |
| 219 |
Added revision block and corrected creation date. |
jshamlet |
1515d 11h |
/ |
| 218 |
Revision sections added,
vdsm8.vhd added. |
jshamlet |
1515d 11h |
/ |
