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Rev Log message Author Age Path
277 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5052d 05h /
276 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5052d 05h /
275 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5052d 05h /
274 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5052d 05h /
273 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5052d 05h /
272 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5052d 05h /
271 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5052d 05h /
270 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5052d 05h /
269 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5052d 05h /
268 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5052d 05h /
267 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5052d 05h /
266 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5052d 06h /
265 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5052d 06h /
264 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5052d 06h /
263 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5052d 06h /
262 Baseline port of GCC 4.5.1 for OpenRISC 1000. jeremybennett 5052d 07h /
261 Linux patch update - all ioremap calls now default with cache inhibit julius 5053d 20h /
260 Fixed `define in FPU that didnt need to be there julius 5053d 20h /
259 Fixing or1200_defines FPU module selection defines - They are no longer needed julius 5055d 16h /
258 Big OR1200 update - FPU, data cache write-back added, spec updated, ODT format doc now main one, default config set to both caches 8K, all integer arithmetic, FPU off julius 5055d 16h /

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