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Rev Log message Author Age Path
52 ORPSoC update - ability to dump part or all of SRAM contents at the end of simulation julius 5357d 23h /
51 ORPSoCv2 updates: cycle accurate profiling, ELF loading julius 5372d 02h /
50 Adding or32_funcs.S julius 5372d 06h /
49 Lots of ORPSoC Updates. Cycle accurate model update. Enabled block read from CPU via debug interface. SMII interface same as devboard but may be broken in sim now. Makefile update julius 5390d 19h /
48 Adds an initialization to keep GCC happy in jp1_ll_read_jp1. jeremybennett 5390d 22h /
47 debug proxy speed increase, block transfers possible with cpu aslong as dbg_interface has appropriate change, usb chip reinit function, changed some of the retry code in the usb transfer functions julius 5400d 06h /
46 debug interfaces now support byte and non-aligned accesses from gdb julius 5406d 07h /
45 Orpsoc eth test fix and script error message update julius 5413d 06h /
44 New SystemC model monitoring functions, ethernet PHY model and test sw, smii decoder for ethernet PHY, various makefile upgrades julius 5442d 06h /
43 Couple of fixes to ORPSoC, new linux patch version in toolchain script julius 5466d 03h /
42 Fixed ORPSoCv2 VCD dumping and UART output in cycleaccurate model julius 5482d 00h /
41 Update to or1k top julius 5485d 01h /
40 Added GDB server to verilog simulation via VPI and make target to build and run this model julius 5486d 07h /
39 Adding OR debug proxy a makefile tweak for uClibc and toolchain install script update julius 5490d 07h /
38 Adding binutils, gcc, uClibc patched source and patches julius 5500d 06h /
37 Update to the toolchain script - uses gcc-core package now instead of complete gcc julius 5500d 07h /
36 Better clean rule in makefile julius 5500d 07h /
35 Download and patch files with README files updated to explain what is in the new repository jeremybennett 5501d 01h /
34 Created directories for download and patch files and added README's explaining what is in each one. jeremybennett 5501d 01h /
33 version 2.1 of GDB 6.8 for the OpenRISC architecture jeremybennett 5501d 01h /

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