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277 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5067d 13h /
276 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5067d 13h /
275 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5067d 13h /
274 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5067d 13h /
273 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5067d 13h /
272 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5067d 13h /
271 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5067d 14h /
270 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5067d 14h /
269 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5067d 14h /
268 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5067d 14h /
267 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5067d 14h /
266 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5067d 15h /
265 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5067d 15h /
264 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5067d 15h /
263 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5067d 15h /
262 Baseline port of GCC 4.5.1 for OpenRISC 1000. jeremybennett 5067d 15h /
261 Linux patch update - all ioremap calls now default with cache inhibit julius 5069d 04h /
260 Fixed `define in FPU that didnt need to be there julius 5069d 05h /
259 Fixing or1200_defines FPU module selection defines - They are no longer needed julius 5071d 00h /
258 Big OR1200 update - FPU, data cache write-back added, spec updated, ODT format doc now main one, default config set to both caches 8K, all integer arithmetic, FPU off julius 5071d 01h /

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