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Rev Log message Author Age Path
415 ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash.
julius 5118d 19h /
414 Updates to add -mredzone and improved GCC optimizations. jeremybennett 5119d 14h /
413 Fixed to combined bug in the assembler and linker. jeremybennett 5120d 16h /
412 ORPSoC update - Rearranged Xilinx ML501, simulations working again. julius 5122d 08h /
411 Improved ethmac testbench and software.

Renamed some OR1200 library functions to be more generic.

Fixed bug with versatile_mem_ctrl for Actel board.

Added ability to simulate gatelevel modules alongside RTL modules
in board build.
julius 5122d 20h /
410 ORPSoC: Adding README in root explaining how to build documentation, and
documentation fixup so it builds properly again.
julius 5123d 20h /
409 ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation.
julius 5123d 20h /
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 5124d 08h /
407 Update or1ksim version in toolchain script to rc2 julius 5124d 11h /
406 ORPmon indented files, bus, align and instruction errors vectors printf and reboot julius 5124d 12h /
405 ORPmon updates - ethernet driver updates julius 5124d 16h /
404 New scripts to build separate bare metal and Linux tool chains. Fixes to GDB so it builds with the Linux tool chain and uses RELA. Other minor fixes to the GCC tool chain. jeremybennett 5124d 16h /
403 ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly. julius 5125d 14h /
402 Further updates to the compiler jeremybennett 5125d 19h /
401 Fixing find first one (ff1) and find last one (fl1) support in OR1200.

Updated documentation, adding missing l.ff1 and l.fl1 opcodes to supported
instructions table.
julius 5125d 19h /
400 Updates to the linker, GCC, newlib and GDB in preparation for supporting C++. The key changes are that the linker now uses RELA and that GCC may save registers at the bottom of the stack before the frame is allocated or after it is deallocated, so exception handlers/thread primitives should not use the first 130 bytes after the SP. jeremybennett 5125d 19h /
399 Updates to the linker, GCC, newlib and GDB in preparation for supporting C++. The key changes are that the linker now uses RELA and that GCC may save registers at the bottom of the stack before the frame is allocated or after it is deallocated, so exception handlers/thread primitives should not use the first 130 bytes after the SP. jeremybennett 5125d 22h /
398 ORPSoCv2 removing generic backend path - not needed julius 5126d 21h /
397 ORPSoCv2:

doc/ path added, with Texinfo documentation. Still a work in progress.

VPI files updated.

OR1200 l.maci instruction test added. highlighting bug with immediate field for that instruction.

Various cycle accurate model updates. Now uses orpsoc-defines.v (processed C-compat. version) to build.
julius 5127d 20h /
396 ORPSoCv2 final software fixes...for now. See updated README julius 5130d 18h /

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