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Rev Log message Author Age Path
1037 First import of the new synopsys DC scripts. lampret 7944d 09h /
1036 Removed old synthesis scripts. lampret 7944d 09h /
1035 Added optional l.div/l.divu insns. By default they are disabled. lampret 7944d 22h /
1034 Fixed encoding for l.div/l.divu. lampret 7945d 01h /
1033 If SR[CY] implemented with OR1200_IMPL_ADDC enabled, l.add/l.addi also set SR[CY]. lampret 7945d 08h /
1032 Added optional SR[CY]. Added define to enable additional (compare) flag modifiers. Defines are OR1200_IMPL_ADDC and OR1200_ADDITIONAL_FLAG_MODIFIERS. lampret 7945d 22h /
1031 Setting phy to 10Mbps full duplex. simons 7946d 13h /
1030 Ethernet configured for 10Mbps. simons 7947d 10h /
1029 Typing error fixed. simons 7947d 10h /
1028 Import. ivang 7947d 10h /
1027 PRINTF/printf mess fixed. simons 7947d 18h /
1026 rtems-20020807 import ivang 7948d 04h /
1025 PRINTF/printf mess fixed. simons 7948d 07h /
1024 Mess with printf/PRINTF fixed. Ethernet test changed to support latest changes. simons 7948d 16h /
1023 Now most of the configuration registers are updatded automatically based on defines in or1200_defines.v. lampret 7949d 03h /
1022 As per Taylor Su suggestion all case blocks are full case by default and optionally (OR1200_CASE_DEFAULT) can be disabled to increase clock frequncy. lampret 7949d 05h /
1021 *** empty log message *** rherveille 7953d 08h /
1020 Fixed several bugs
Working version, tested on Bender hardware		 rherveille 7953d 08h /
1019 fixed some bugs detected by Bender hardware rherveille 7953d 08h /
1018 TX_BD_NUM register now contains a real number of transmit BDs (before this was n*2) simons 7953d 15h /

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