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Rev Log message Author Age Path
1198 make it compile on RH 8,9 phoenix 7580d 00h /
1197 disabled ram-init of ps2 (old) +
changed MAC type into DOS type, so that Xilinx ISE can work with it
dries 7585d 04h /
1196 removed second debug/Makefile (credits: Daniel Wiklund - danwi@isy.liu.se) dries 7585d 06h /
1195 made the project file a little bit more universal dries 7585d 07h /
1194 correct all the syntax errors dries 7585d 07h /
1193 disabled SRAM_GENERIC and added comment +
corrected 'wb_err' into 'wb_err_o'
dries 7585d 07h /
1192 disabled 'bench_defines.v' during synthesis +
added define to specify usage of flash instruction address
dries 7585d 09h /
1191 disabled 'bench_defines.v' during synthesis +
added define to specify usage of flash instruction address
dries 7585d 09h /
1190 This commit was manufactured by cvs2svn to create tag 'rel_14'. 7601d 08h /
1189 This commit was manufactured by cvs2svn to create tag 'rel_13'. 7601d 08h /
1188 Added support for rams with byte write access. simons 7601d 08h /
1187 This commit was manufactured by cvs2svn to create tag 'rel_12'. 7602d 07h /
1186 Added support for rams with byte write access. simons 7602d 07h /
1185 This commit was manufactured by cvs2svn to create tag 'rel_11'. 7609d 00h /
1184 Scan signals mess fixed. simons 7609d 00h /
1183 OpenRISC port of gdb-5.3 straightforwardly derived from gdb-5.0 sfurman 7613d 15h /
1182 This commit was manufactured by cvs2svn to create tag 'VER_5_3'. 7613d 17h /
1181 Initial import of unmodified gdb-5.3 source on vendor branch sfurman 7613d 17h /
1180 This commit was manufactured by cvs2svn to create tag 'rel_10'. 7617d 03h /
1179 BIST interface added for Artisan memory instances. simons 7617d 03h /

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