OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] - Rev 144

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
144 Modifications necessary for functional gdb interface chris 8537d 19h /
143 Modifications necessary to work with JTAG or1ksim simulator chris 8537d 19h /
142 Modifications for a functional gdb environment chris 8537d 19h /
141 Added l_trap() chris 8537d 19h /
140 Modifications to work with or1ksim JTAG simulator chris 8537d 19h /
139 Modifications for functional gdb chris 8537d 19h /
138 - on the fly insn decoding
- removed asm input file support
- removed string from execution
- speedup of loading
markom 8540d 22h /
137 Added TRAP exception chris 8541d 21h /
136 Fixed the DSR/DRR debug register definitions which were stored backwards chris 8541d 21h /
135 Fixed a couple of bugs related to updating registers over JTAG
during debugging.
chris 8541d 21h /
134 *** empty log message *** markom 8543d 20h /
133 moved header files to match other utilities
repaired l.sra and some other shifting instructions
started build_automata for binary instruction decode
markom 8543d 21h /
132 Added option for socket libraries under Solaris chris 8544d 19h /
131 Initial checkin of the Debug Unit register descriptions chris 8544d 19h /
130 Initial checkin of the debug unit module chris 8544d 19h /
129 Added code to inject insn from Debug Unit DIR chris 8544d 19h /
128 Added code to check debug unit after an exception chris 8544d 19h /
127 Added GDB debugging protocol. chris 8544d 19h /
126 Added JTAG proxy protocol definitions chris 8544d 20h /
125 Fixed a bug involving failure to reset chain after or1k_flush_pipeline() chris 8544d 20h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.