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Rev Log message Author Age Path
207 Several major changes to allow gdb to work with an Or1k implementation
that does not need a writeable PC. This version will use the breakpoint
vector and install a new vector into the EPC register, and then single
step out of the breakpoint exception. The breakpoint exception vector
must include only 2 commands: l.rfe and l.nop. Anything else and this
gdb version will fail w/ or1ksim.		 chris 8303d 22h /
206 Several modifications to support gdb in a new exception style mode.
This new version works with gdb, and does not require the simulator
to implement a writeable PC.		 chris 8303d 22h /
205 Adding debug capabilities. Half done. lampret 8308d 02h /
204 Added function prototypes to stop gcc from complaining erez 8310d 17h /
203 Updated from xess branch. lampret 8312d 07h /
202 changed configure.in and acconfig.h to check for long long
reran autoheader & autoconf		 erez 8317d 14h /
201 readfunc() and writefunc() now use unsigned long values instead of unsigned char. erez 8317d 14h /
200 Initial import simons 8320d 22h /
199 Initial import simons 8320d 23h /
198 Moved from testbench.old simons 8323d 10h /
197 This is not used any more. simons 8323d 10h /
196 Configuration SPRs added. simons 8323d 10h /
195 New test added. simons 8323d 10h /
194 Fixed a bug for little endian architectures. Could cause a hang of
gdb under some circumstances.		 chris 8323d 18h /
193 Declared RISCOP.RESET to be volatile so that -O2 optimization would
not optimize away the correct behavior by trying to be too clever.		 chris 8323d 18h /
192 Removed GlobalMode reference causing problems for --disable-debugmod
option.		 chris 8324d 04h /
191 Added UART jitter var to sim config chris 8325d 00h /
190 Added jitter initialization chris 8325d 00h /
189 fixed mode handling for tick facility chris 8325d 00h /
188 fixed PIC interrupt controller chris 8325d 00h /

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