URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] - Rev 359

Rev	Log message	Author	Age	Path
359	Added optional sampling of inputs.	lampret	8269d 15h	/
358	Fixed virtual silicon single-port rams instantiation.	lampret	8269d 15h	/
357	Fixed dbg_is_o assignment width.	lampret	8269d 15h	/
356	Break point bug fixed	simons	8269d 17h	/
355	uart VAPI model improved; changes to MC and eth.	markom	8270d 01h	/
354	Fixed width of du_except.	lampret	8270d 11h	/
353	Cashes disabled.	simons	8270d 22h	/
352	OR1200_REGISTERED_OUTPUTS can now be enabled.	lampret	8272d 01h	/
351	Fixed some l.trap typos.	lampret	8272d 02h	/
350	For GDB changed single stepping and disabled trap exception.	lampret	8272d 04h	/
349	Some bugs regarding cache simulation fixed.	simons	8273d 16h	/
348	Added instructions on how to build configure.	ivang	8275d 00h	/
347	Added CRC32 calculation to Ethernet	erez	8275d 21h	/
346	Improved Ethernet simulation	erez	8275d 23h	/
345	Added check for net/ethernet.h (needed by ethernet simulator)	erez	8275d 23h	/
344	added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model	markom	8276d 01h	/
343	Small touches to test programs	erez	8276d 03h	/
342	added exception vectors to support and modified section names	markom	8277d 00h	/
341	added VAPI for uart; uart 16550 support, some bugs fixed	markom	8277d 02h	/
340	Added hpint vector	lampret	8277d 02h	/