OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] - Rev 392

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
392 This commit was manufactured by cvs2svn to create tag 'stable'. 8258d 09h /
391 Fixed except_stop width and fixed EX PC for 1400444f no-ops. lampret 8258d 09h /
390 Changed instantiation name of VS RAMs. lampret 8258d 11h /
389 Changed default delay for load and store in superscalar cpu. lampret 8258d 11h /
388 Added comments for cpu section. lampret 8258d 11h /
387 Now FPGA and ASIC target are separate. lampret 8258d 13h /
386 Fixed VS RAM instantiation - again. lampret 8258d 13h /
385 check testbench now modified to work with new report output markom 8258d 19h /
384 modified simmem.cfg structure! ADD > BEFORE EACH LINE! markom 8258d 20h /
383 modified simmem.cfg structure! ADD markom 8258d 20h /
382 bitmask function bug fixed markom 8258d 22h /
381 number display is more strict with 0x prefix with hex numbers markom 8258d 22h /
380 all tests pass check markom 8258d 23h /
379 bug fixed. markom 8258d 23h /
378 cleanup in testbench; pc divided into ppc and npc markom 8259d 00h /
377 cleanup in testbench; pc divided into ppc and npc markom 8259d 00h /
376 int.c and int.h are general enough and should be useful for other tests beside uos markom 8259d 01h /
375 Support for breakpoints changed. simons 8259d 10h /
374 *** empty log message *** simons 8259d 16h /
373 update after links markom 8259d 20h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.