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Rev Log message Author Age Path
406 Renamed ethernet's RX_BD_ADR to RX_BD_NUM erez 8376d 14h /
405 Stepping trough l.jal and l.jalr fixed. simons 8377d 15h /
404 is_delayed() is used outside this file. simons 8377d 15h /
403 Prompt changed because ddd requires (gdb). simons 8377d 15h /
402 Added OR1200_GENERIC_MULTP2_32X32 and OR1200_ASIC_MULTP2_32X32 lampret 8377d 20h /
401 *** empty log message *** simons 8381d 06h /
400 force_dslot_fetch does not work - allways zero. simons 8381d 06h /
399 Trap insn couses break after exits ex_insn. simons 8381d 06h /
398 added register field defines ivang 8383d 11h /
397 removed or16 architecture markom 8383d 13h /
396 added missing file markom 8383d 15h /
395 removed obsolete dependency and history from cpu section markom 8383d 17h /
394 dependency joined with dependstats; history moved to sim section markom 8383d 18h /
393 messages: exception on many places changed to abort markom 8383d 18h /
392 This commit was manufactured by cvs2svn to create tag 'stable'. 8384d 02h /
391 Fixed except_stop width and fixed EX PC for 1400444f no-ops. lampret 8384d 02h /
390 Changed instantiation name of VS RAMs. lampret 8384d 04h /
389 Changed default delay for load and store in superscalar cpu. lampret 8384d 04h /
388 Added comments for cpu section. lampret 8384d 04h /
387 Now FPGA and ASIC target are separate. lampret 8384d 05h /

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